time-mode signal quantization for use in sigma-delta modulators

the rapid scaling in modern cmos technology has motivated the researchers to design new analog-to-digital converter (adc) architectures that can properly work in lower supply voltage. an exchanging the data quantization procedure from the amplitude to the time domain, can be a promising alternative well adapt with the technology scaling. this paper is going to review the recent development in time-based noise-shaping adcs, so-called as time-based sigma-delta modulators. two of the most important architectures named as voltage-controlled oscillator (vco) -based and time-to-digital (tdc) -based sigma-delta modulators (sdms) are selected to be reviewed in this paper. the intrinsic advantages and limitations of the these structures are briefly explored. to confirm the effectiveness of the time-mode sigma-delta modulators, a tdc-based continuous-time sigma-delta modulator is proposed as an example and the related simulation results performed in matlab are illustrated. the simulation results show that the proposed modulator achieves a dynamic range of 67 db over 30 mhz with the loop filter of order 2. the proposed tdc-based sigma-delta modulator shows the superiority of the time quantization approach in designing the wideband and less complex continuous-time sdms.